1. Field of the Invention
The present invention relates to IC card circuits, and more particularly to a circuit for detecting the completed connection of an IC card to a terminal.
2. Description of the Background
Portable cards having various combinations of memory, mass storage, and communications functions such as IC cards are known in the prior art. Most recent IC cards are designed to meet an industry standard interface specification, although many non-standard IC cards have been described also. The most common standard adopted by the electronics industry has been set forth by the Personal Computer Memory Card Interface Association (PCMCIA). The electronics manufacturers who are members of the PCMCIA meet and agree upon the definition of a standard.
The PCMCIA sets standards that allow for increased compatibility between host computer systems and the peripheral IC cards which can be attached to the host computer system. The standard defines the interface requirements but does not dictate the particular circuit implementation used to meet the criteria of the specification.
The IC card is usually carried by a user and inserted into terminal units of various systems in order to use the IC card. The terminal unit may or may not be powered up at the time the IC card is inserted into or removed from the terminal unit. It has been a goal of the prior art to have a mode of use of an IC card referred to by the industry as "hot-swapping". Hot-swapping implies that an IC card can be inserted or removed from a terminal unit independent of the state of the host terminal. The host terminal unit may or may not be operating on the IC card when the card is removed. Host terminal units capable of hot-swapping are electrically compatible with the action of an IC card being connected onto or removed from the host terminal.
A technique which is known quite well, and required to meet the standards set by the PCMCIA, is to have two Card Detection (CD) connections on the connector between the host terminal unit and the IC card. These pins are found on the outside edges of the connectors, and there are usually two such pins called CD1 and CD2, located at opposing ends of the array of contacts which comprise the connector. If the card is inserted improperly, such as on an angle, then one of the CD1 or CD2 sockets on the IC card will not make contact with the associated pins of the host terminal. If both CD1 and CD2 make contact with the host terminal unit then the host terminal unit recognizes that a card is present. The PCMCIA standard recommends electrically connecting CD1 and CD2 pins to the ground pins. When the host terminal controller detects a voltage less than 0.8 volts, on either host terminal card detect pin, CD1 and/or CD2, then the host recognizes the state of having an IC card attached to the host terminal IC card connector.
The PCMCIA standard specifies the length for each pin on the host connector. The power supply, and ground contacts are the longest at 0.197+/-0.004 inches, the card detect pins are the shortest at 0.0138+/-0.004 inches, all other pins are an intermediate length of 0.167+/-0.004 inches. On the IC card side all the socket contacts are the same length.
The staggering of the pins allows for hot-insertion of an IC card into a host terminal and also hot removal of an IC card from a host terminal. First the power pins contact, supplying power to the card so that when the signal pins contact next, the inputs are not latched due to too much current sinking into the protection diodes commonly found on CMOS integrated circuits. Similar rationale for the removal. The card is inserted slowly relative to the speed at which the computer and circuits can respond to connections being made sequentially with respect to time. Thus the proper sequencing of the operations required to preserve the integrity of the IC card is performed.
The PCMCIA specification calls specifically for the card detect pins, CD1 and CD2 to be the shortest pins on the host connector. This allows for the other signal of the IC card to be securely connected before the host terminal recognizes that a card is present.
U.S. Pat. No. 5,016,223 granted to Kimura, describes in column 12, line 32, use of "the shortest contact of the parts connected to the terminal unit" as useful for a card detect means.
A critical requirement in the use of the staggered contact scheme is the speed of card insertion which will maintain the allowed time for sequencing the IC card connections. If a card is inserted too fast for the system to respond then the IC card may be subjected to conditions at which it will fail to operate reliably. Such as in the case of a large capacitor on the power supply that has not charged up fully from the power supply pins, and thus the signal pins could leak current through the input protection diode to the power supply. If a card is inserted too fast then the benefits of having staggered contacts is diminished.
The specification of the physical length of the sockets of the IC card allow for a controlled transition for the insertion of the IC card into and removal of the IC card from the host terminal unit.
The PCMCIA standard recommendations state that the card detect pins on the IC card should be directly connected to ground and the ground pins on the IC card. IC cards meeting the PCMCIA standard are required to hold the CD1 and CD2 below 0.8 volts.
The PCMCIA specification requires the host terminals to electrically connect the CD1 and CD2 male pins to a system voltage such as +5 v through a pull-up resistor greater than a minimum value defined by the specification (10 KOhms or larger). Therefore, if the host terminal controller senses a voltage near ground on the CD1 and CD2 pins then an IC card is present and system initialization processing begins. If the host terminal senses a voltage near the system power supply voltage on the card detect pins of the host connector, then an IC card is not connected or has been disconnected. In the case of the disconnection a system disconnection processing can begin.
As the IC card is removed from the host terminal unit the CD1 and CD2 contacts disengage first. This provides a certain amount of time before the power supply contacts are disconnected and additional time before the data, address, and control contacts are disengaged. In the first amount of time, the host terminal card socket controller unit generally generates an interrupt to the host terminal CPU to immediately suspend operations on the IC card. By the time the power supply pins disconnect, the host terminal usually but not in all circumstances should be able to spend operations on the IC card.
It has also been shown in the prior art that the IC card circuit includes a power supply voltage detection circuit that senses the condition of a disconnected power supply pins or the computer powering down. The prior an shows that the power supply voltage is compared to a set point and this comparison output is used to suspend access to the IC card upon detecting the power supply from the host terminal has been removed or is shutting down. This method of protecting the IC card from erroneous access from the host terminal unit is limited in its effectiveness, because controllers are more susceptible to error during power supply cycling. There are additional conditions under which failure can occur. Such as if the card were inserted or removed too fast for the IC card and the host terminal to respond with the proper sequencing of the circuits.
There are the following problems in the conventional IC cards that have been described in the prior art. That is,
1) The circuit relies on the kinetic speed of the card being inserted and extracted to provide the required time for proper sequencing of the contacts engagements and disengagement. PA1 2) The circuit does not account for problems with contacts other than the card detect pins not making contact. Any of the contacts can remain unconnected or can become disconnected from vibration, and from debris between the contacts. PA1 3) The power supply does not ramp up and down, but is subject to a step function. This could cause problems with dynamic random access memories, (DRAM), which rely on the voltage of the capacitors being maintained relative to the power supply. This is a problem when DRAM is intended to replace static random access memory, (SRAM), PCMCIA memory IC cards. PA1 4) The circuit is asynchronous; some IC cards will not be immediately ready to function, this circuit assumes that there will be no need for a long setup on the card before initialization commands are sent from the terminal. This circuit does not allow the IC card time to setup. SRAM cards do not require this time, but other cards such as battery backed DRAM have to be synchronized prior to access. PA1 5) There is no provision to ramp up the power supply on the IC card as required by circuits on the IC card. Again, DRAM in a special low voltage battery backup mode need to be ramped up to the operating voltage at a limited rate, prior to use. A voltage spike or bump can cause error in refreshing the DRAM. The power supply may be subject to a rapid rise is the voltage level when connected to a host power supply. Some voltage sensitive circuits, especially dynamic random access memory, common in the industry and referred to as DRAM, have specifications which limit the change in the power supply voltage over time. DRAMs will fail to maintain data properly if the power supply voltage changes too quickly. PA1 6) The circuit relies on the host controller to determine the state of the card in the socket and there is no provision for the card to determine directly that it is completely attached to the host.
The prior art does not show a voltage ramping circuit when switching over from the host power supply to the battery power supply. The prior art shows a simple pass transistor that isolates the host power supply from the circuit which remains powered by the battery backup power supply.
It is the purpose of the present invention to overcome the disadvantages of the prior art by disclosing an improved circuit which provides for increased reliability and functionality in the detection of the conditions under which the IC card can protect itself from erroneous access.